|
Home > Program
Program
| Friday |
July 2nd, 2010
|
| from 9.00 |
Registration |
| 9.45-10.00 |
Opening Session |
| 10.00-11.30 |
Reversible Software & Simulation
Chair: Irek Ulidowski
A Compiler for Garbage-Free Translation of Reversible Languages
Holger Bock Axelsen (University of Copenhagen)
New program constructs and semantics for reversible computation
Bill Stoddart (Teesside University), Campbell Ritchie (Teesside University)
Optimization of Input-Erasing Clean Reversible Simulation for Injective Functions
Tetsuo Yokoyama (Nanzan University), Holger Bock Axelsen (University of Copenhagen), Robert Glück (University of Copenhagen)
|
| 12.00-12.50 |
Reversible Circuit Elements
Chair: Holger Bock Axelsen
Non-degenerate 2-State Reversible Logic Elements with Three or More Symbols Are All Universal
Kenichi Morita (Hiroshima University), Tsuyoshi Ogiro (Hiroshima University), Artiom Alhazov (Hiroshima University), Tsuyoshi Tanizawa (Hiroshima University)
Work-in-Progress: RIMEP for Designing Reversible Adders and Multipliers
Fatima Z. Hadjam (University of Djillali Liabes), Claudio Moraga (European Centre for Soft Computing, Dortmund University of Technology)
|
| 12.50-14.30 |
Lunch |
| 14.30-15.50 |
Synthesis of Reversible Circuits
Chair: D. Michael Miller
An approach to reversible circuits synthesis based on switching networks
Marek Szyprowski (Warsaw University of Technology)
Near-Optimal Ordering of ESOP Cubes for Toffoli Networks
Zakaria Hamza (University of New Brunswick), Gerhard W. Dueck (University of New Brunswick)
Work-in-Progress: Hierarchical Synthesis of Reversible Circuits Using Positive and Negative Davio Decomposition
Mathias Soeken (University of Bremen), Robert Wille (University of Bremen), Rolf Drechsler (University of Bremen)
|
| 16.10-17.00 |
Tools & Benchmarks for Reversible Circuit Design
Chair: Alexis De Vos
Properties of Hard Reversible Boolean Functions
Pawel Kerntopf (Warsaw University of Technology), Marek Szyprowski (Warsaw University of Technology)
Tool presentation: RevKit: A Toolkit for Reversible Circuit Design
Mathias Soeken (University of Bremen), Stefan Frehse (University of Bremen), Robert Wille (University of Bremen), Rolf Drechsler (University of Bremen)
|
| 18.00 |
Social Event (further information at this page) |
| |
|
| Saturday |
July 3rd, 2010 |
| 10.00-11.00 |
Reversible and Quantum Circuit Decomposition
Chair: Daniel Große
Reversible computation, quantum computation, and computer architectures in between
Alexis De Vos (Universiteit Gent), Michiel Boes (Universiteit Gent), Stijn De Baerdemacker (Universiteit Gent)
Mapping a Multiple-control Toffoli Gate Cascade to an Elementary Quantum Gate Circuit
Zahra Sasanian (University of Victoria), D. Michael Miller (University of Victoria)
|
| 11.30-12.20 |
Quantum Circuit Synthesis
Chair: Gerhard W. Dueck
Synthesis of Semi-Classical Quantum Circuits
Shigeru Yamashita (Ritsumeikan University), Shin-ichi Minato (Hokkaido University), D. Michael Miller (University of Victoria)
Work-in-Progress: GPU Library Based Approach to Quantum Logic Synthesis
Marek Perkowski (Portland State University), Martin Lukac (Tohoku University), Pawel Kerntopf (Warsaw University of Technology), Michitaka Kameyama (Tohoku University)
|
| 12.20-14.00 |
Lunch |
| 14.00-14.50 |
Physical Realizations of Reversible Circuits
Chair: Alberto García-Ortiz
Reversible implementation of a discrete integer linear transformation
Alexis De Vos (Universiteit Gent), Stephane Burignat (Universiteit Gent), Michael Kirkedal Thomsen (University of Copenhagen)
Work-in-Progress: An Empirical Study on Area, Power and Delay of a Class of Reversible Circuits in CMOS
Dilip Vasudevan (University College Cork), Emanuel Popovici (University College Cork), Michel Schellekens (University College Cork)
|
| 15.30-16.20 |
Test of Reversible Circuits
Chair: Robert Wille
Detection of Multiple Missing-Gate Faults in Reversible Circuits
Dipak K. Kole (Bengal Engineering & Science University), Hafizur Rahaman (Bengal Engineering & Science University), Debesh K. Das (Jadavpur University), Bhargab B. Bhattacharya (Indian Statistical Institute)
Work-in-Progress: Gate Oxide Shorts Analysis and Modeling in CMOS Based Reversible Circuits
Alexandru Amaricai (University Politehnica of Timisoara), Oana Boncalo (University Politehnica of Timisoara)
|
| 17.00 |
Sightseeing Tour (for people interested)
|
| Download |
|
| |
|
|
|
|
