Call for Papers

Reversible computation has a growing number of promising application areas such as low power design, decoding, program debugging, testing, database recovery, discrete event simulation, reversible algorithms, reversible specification formalisms, reversible programming languages, process algebras, and the modeling of biochemical systems. Furthermore, reversible logic provides a basis for quantum computation with its applications, for example, in cryptography and in the development of more efficient algorithms. First reversible circuits and quantum circuits have been implemented recently and are seen as promising alternatives to CMOS technology.

The workshop will bring together researchers from computer science, mathematics, and physics to discuss new developments and directions for future research in Reversible Computation. This particularly includes applications of reversibility in quantum computation. Research papers, tutorials, tool demonstrations, and work-in-progress reports are within the scope of the workshop. Invited talks by leading international experts will complete the program.

Contributions on the following topics in Reversible Computation are welcome:

• Architectures
• Algorithms
• Circuit Design
• Debugging
• Fault Tolerance and Error Correction
• Hardware
• Information Theory
• Physical Realizations
• Programming Languages
• Quantum Computation
• Software
• Synthesis
• Theoretical Results
• Testing
• Verification

Interested researchers are invited to submit full research papers (8 pages maximum) as well as tutorial, work-in-progress, or demonstration papers (4 pages maximum). We recommend that all submissions use the IEEE-style format. A preliminary version of the proceedings will include all accepted papers and will be available at the workshop.

The authors of selected papers will be invited after the workshop to prepare a final version of their paper to be published in an official publication venue. The 2nd Workshop on Reversible Computation will take place on July 2nd and 3rd, 2010 in Bremen, Germany and is organized by the Group of Computer Architecture at the University of Bremen.

Important Dates:
- Submission Deadline: April 25th, 2010 [extended]
- Notification of Acceptance: May 23rd, 2010
- Final Version: June 6th, 2010
- Workshop: July 2nd-3rd, 2010